;wip
!ram = $7FC710 ;6

Init:
LDA $0100
CMP #$14
BEQ +
RTL
+
LDA !carl_initialized
BNE Main
LDA #$01
STA !carl_initialized
LDA #$0D
STA $7F8003
STA $7F8006
STA $7F8009
LDA $13
STA $148B|!addr
JSL $01ACF9|!bank
LDA #$04
STA !ram
LDA $148D|!addr
AND #$03
INC
ASL
STA !ram+1
LDA $148E|!addr
AND #$03
INC
ASL
EOR #$FF
INC
STA !ram+2

LDA #$00
STA !ram+3
LDA #$40
STA !ram+4
LDA #$B0
STA !ram+5
InitEnd:
RTL

Main:
;CMP #$14
;BNE InitEnd
PEI ($00) ;carl runs during lag frames
PEI ($02)
LDY #$08
LDX #$02
.loop
LDA.l KeyXPos,x
STA $00
LDA.l KeyYPos,x
STA $01

LDA.l !ram,x
STA $02
STZ $03
BPL +
DEC $03
+
REP #$20
LDA.l !ram+3,x
AND #$00FF
CLC
ADC $02
CMP #$00FF
SEP #$20
BCC +
BIT $02
BPL +++
JSL $01ACF9|!bank
LDA $148D|!addr
BPL ++
AND #$7F
PHA
LDA $13
STA $148B|!addr
PLA
++
-
CMP #$5F
BCC ++
SBC #$5E
BRA -
++
CMP #$2A
BCS ++
CMP #$11
BEQ +++
STA $1DF9|!addr
BRA +++
++
SBC #$2A
STA $1DFC|!addr
+++
LDA $148E|!addr
AND #$03
INC
ASL
BIT $02
BMI ++
EOR #$FF
INC
++
STA !ram,x
+
STA !ram+3,x
LSR #4
PHX
TAX
LDA.l KeyTile
STA $0202|!addr,y
LDA.l KeyProp,x
STA $0203|!addr,y
LDA.l KeyXOffset,x
CLC
ADC $00
STA $0200|!addr,y
LDA.l KeyYOffset,x
CLC
ADC $01
STA $0201|!addr,y
LDA #$02
STA $0420|!addr,x
DEY #4
PLX
DEX
BMI .end
JMP .loop
.end
REP #$20
PLA
STA $02
PLA
STA $00
SEP #$20
RTL

KeyXPos:
db $20,$60,$C0
KeyYPos:
db $48,$90,$18

KeyXOffset:
db $00,$01,$02,$04,$07,$0B,$0E,$0F
db $11,$12,$15,$19,$1C,$1E,$1F,$20
KeyYOffset:
db $00,$02,$04,$07,$0A,$0D,$0F,$10
db $10,$0F,$0D,$0A,$07,$04,$02,$00
KeyTile:
db $EC
KeyProp:
db $30,$30,$30,$30,$30,$30,$B0,$B0
db $E0,$E0,$70,$70,$70,$70,$70,$70

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